HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 277

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

6.3
In chained-block transfer mode, transmit/receive data is stored in buffers in system memory. Each
buffer has a descriptor indicating the buffer attributes. The buffers are linked by these descriptors.
6.3.1
Descriptors and buffers in system memory for memory-to-MSCI chained-block transfer mode are
shown in figure 6.8.
Each descriptor consists of a 16-bit chain pointer (CP), 24-bit buffer pointer (BP), 16-bit data
length field (DL), and 8-bit status field (ST). These fields are allocated to system memory in byte
units. The descriptor format is shown in figure 1.22. Detailed descriptions of these fields are
given below.
Chain Pointer (CP) (16 Bits): Specifies the low-order 16 bits of the 24-bit start address of the
next descriptor. The high-order eight bits are specified by the chain pointer base (CPB). The
chain pointer value is loaded into the current descriptor address register (CDA) at buffer
switching.
Figure 6.8 Descriptors and Buffers in Memory-to-MSCI Chained-Block Transfer Mode
Descriptors
Memory-to-MSCI Chained-Block Transfer Mode (Transmission)
Chain pointer (CP) A (16 bits)
Buffer pointer (BP) A (24 bits)
Chain pointer (CP) B (16 bits)
Buffer pointer (BP) B (24 bits)
Data length (DL) A (16 bits)
Data length (DL) B (16 bits)
Status (ST) A (8 bits)
Status (ST) B (8 bits)
Descriptor table
Memory
: Transmit data
Rev. 0, 07/98, page 261 of 453
Buffer A
Buffer B
Memory