HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 230

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

5
6
Note: The ADPLL enters search mode when an enter-search-mode command is issued. For
5.5.2
The ADPLL has two main functions: clock component extraction from noise-suppressed receive
data, and receive clock noise suppression.
Clock Component Extraction from Receive Data: The flow of receive data and the ADPLL
operating clock signals for clock extraction are shown in figure 5.33. Either the receive baud rate
generator output from clock line 1 or the external clock (RXC line input) from clock line 2 can be
used as the ADPLL clock.
Rev. 0, 07/98, page 214 of 453
Receive
clock noise
suppression
Maximum bit
rate for receive
clock noise
suppression
details, see section 5.5.3, Enter-Search-Mode Command.
Operation
Operating
mode
Operating
mode
8
16 x<2/16
32 x<4/32
8
16
32
x<1/8
1/8 x<2/8
2/16 x<3/16 3/16 x
4/32 x<5/32 5/32 x
1.25 Mbps
0.62 Mbps
0.31 Mbps
(x: Noise width/1-bit cell width)
2/8 x
Clock
extractor
does not
function for
receive
clock noise
suppres-
sion