HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 158

no-image

HD64570

Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64570CP
Manufacturer:
RENESAS
Quantity:
6 500
Part Number:
HD64570CP
Manufacturer:
HIT
Quantity:
5 510
Part Number:
HD64570CP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
HD64570CP
Quantity:
345
Part Number:
HD64570CP16
Manufacturer:
HIT
Quantity:
5 510
Part Number:
HD64570CP16
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64570F
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64570F16
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64570F16
Manufacturer:
HIT
Quantity:
1 000
Part Number:
HD64570F16
Manufacturer:
HITACHI/日立
Quantity:
20 000
Part Number:
HD64570F16V
Manufacturer:
INFINEON
Quantity:
12 000
Bit 4 (FRME/RBIT: Framing Error/Residual Bit Frame): Indicates a framing error detection
in asynchronous mode, and residual bit frame detection in bit synchronous mode. This bit is
cleared when 1 is written to this bit position.
Bit 3 (OVRN: Overrun Error): Indicates whether or not an overrun has occurred. This bit is
cleared when 1 is written to this bit position. In asynchronous and byte synchronous modes, this
bit is cleared when 1 is written to this bit position, or the receiver is reset. In bit synchronous
mode, all bits of this register are also reset when the status data is loaded into the frame status
register (FST).
Bit 2 (CRCE: CRC Error): Indicates whether or not a CRC error has occurred in byte or bit
synchronous mode.
Rev. 0, 07/98, page 142 of 453
Reserved. This bit always reads 0 and can be set to 0 or 1.
Bit synchronous mode
The ABT bit indicates whether or not an abort end frame has been detected.
This bit is set to 1 by the character preceding the abort sequence when the receive frame ends
with an abort. When this bit is set to 1, the EOM bit is also set to 1. See Abort End Frame
Reception Operation below.
ABT = 0:
ABT = 1:
Asynchronous mode
FRME = 0:
FRME = 1:
Once set to 1, this bit is not cleared until the receiver is reset or 1 is written to this bit position.
Byte synchronous mode
Reserved. This bit always reads 0 and can be set to 0 or 1.
Bit synchronous mode
RBIT = 0:
RBIT = 1:
When the CRCCC bit of MD0 is 1, this bit is set to 1 by the residual bit of the last character in
the receive frame I field. When the CRCCC bit is 0, the RBIT bit is set to 1 by the residual bit
of the last character of FCS.
When the RBIT bit is set to 1, the EOM bit is also set to 1. See Residual Bit Frame Reception
Operation below.
Asynchronous/Byte synchronous/Bit synchronous modes
OVRN = 0:
OVRN = 1:
Asynchronous mode
Indicates that no abort end frame has been detected
Indicates that an abort end frame has been detected
Indicates that no framing error has occurred
Indicates that a framing error has occurred
Indicates that no residual bit frame has been detected
Indicates that a residual bit frame has been detected
Indicates that no overrun error has occurred
Indicates that an overrun error has occurred

Related parts for HD64570