HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 63

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HD64570

Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Table 2.6
Symbol
WR/R/W
A
0
/LDS
CP-84
3
8
Bus Interface Lines (cont)
Pin Number
FP-88
14
19
Input/
Output
Input/
output
Input/
output
Description
Master mode
Slave mode
Reset mode
System stop
mode
CPU modes 0, 1
Address: Least significant bit of the address
bus.
Master mode
Slave mode
Reset mode
System stop
mode
CPU modes 2, 3
Lower data strobe: Strobe timing for the low-
order data bits.
Master mode
Slave mode
Reset mode
System stop
mode
Output line. When this line is
driven high, data moves in the
input direction. When this line
is driven low, data moves in
the output direction.
Input line. When this line is
driven high, data moves in the
output direction. When this line
is driven low, data moves in
the input direction.
Input.
Input.
Output.
Input.
Input.
Input.
Output.
Input.
Input.
Input.
Rev. 0, 07/98, page 47 of 453

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