HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 241

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

5.6
5.6.1
The MSCI uses an internal baud rate generator (BRG) to generate the MSCI transmit/receive
clock. The BRG has the following main features:
Figure 5.43 is the baud rate generator block diagram.
CLK
Output clock frequency range from f
(f
TXD or RXD lines.
Frequency accuracy within 0.5% for any frequency range from f
frequency and f
Independent transmit and receive frequencies can be specified as 2
integer).
f
CLK
: System clock frequency). When f
f
Time constant register
BRG
Baud Rate Generator
Overview
Reload
BRG
timer
TMC
50 set value in the time constant register (TMC) (%), where f is the target
8
BRG
Figure 5.43 Baud Rate Generator Block Diagram
is the BRG output frequency set to the value closest to f (f
1/1 to
1/256
(TMC)
Divider
CLK
to f
BRG
CLK
= f
10
10
/2
CLK
RX clock source register
TX clock source register
17
BRG output
BRG output
, BRG output cannot be obtained from the
(2
Receive
Transmit
selector
selector
RXBR
17
TXBR
= 131,072).
Rev. 0, 07/98, page 225 of 453
1/2 to
1/2
1/2 to
1/2
(RXS)
CLK
(TXS)
CLK: System clock
n
(where n is a positive
0
17
0
17
/100 to f
BRG output
(for reception)
BRG output
(for transmission)
CLK
CLK
/2
17
f f
.
CLK
/2
17
).