HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 162

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bits 7 6: Reserved. These bits always read 0.
Bit 5 (SLOOP: Sending on Loop): Indicates MSCI data transmission status in bit synchronous
mode. This bit is set to 1 when the MSCI is transmitting data, and is cleared otherwise. This is a
read-only bit, and writing to it has no effect.
Bit 4 (SRCH: Search Mode): Indicates whether or not the ADPLL is in search mode. This bit is
valid for transmission using FM codes in byte or bit synchronous mode. This is a read-only bit,
and writing to it has no effect. This bit is set to 1 by an enter search command or automatic search
mode initiated by two-clock missing detection.
Bit 3 (CTS: CTS Input Line Status): Indicates the CTS line level. This is a read-only bit, and
writing to it has no effect.
Bit 2 (DCD: DCD Input Line Status): Indicates the DCD line level. This is a read-only bit, and
writing to it has no effect.
Bit 1 (TXENBL: TX Enable): Indicates whether the transmitter is enabled or disabled.
Transmitter enable/disable selection is performed by a command. This is a read-only bit, and
writing to it has no effect.
Rev. 0, 07/98, page 146 of 453
Asynchronous/Byte synchronous mode
Reserved. This bit always reads 0.
Bit synchronous mode
SLOOP = 0: Indicates that the MSCI is not transmitting data
SLOOP = 1: Indicates that the MSCI is transmitting data
Asynchronous mode
Reserved. This bit always reads 0.
Byte synchronous/Bit synchronous mode
SRCH = 0:
SRCH = 1:
Asynchronous/Byte synchronous/Bit synchronous mode
CTS = 0:
CTS = 1:
Asynchronous/Byte synchronous/Bit synchronous mode
DCD = 0:
DCD = 1:
Asynchronous/Byte synchronous/Bit synchronous mode
TXENBL = 0:Indicates that the transmitter is disabled
Indicates that the ADPLL is not in search mode
Indicates that the ADPLL is in search mode
Indicates that the CTS input line is low
Indicates that the CTS input line is high
Indicates that the DCD input line is low
Indicates that the DCD input line is high