HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 7

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HD64570

Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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This user's manual describes the functions, performance, and usage of the HD64570 serial
communications adaptor (SCA) as a general-purpose communications control chip.
This manual consists of eleven chapters and an appendix.
— Section 1 Overview
— Section 2 Pin Arrangements and Functions
— Section 3 System Controller
— Section 4 Interrupt Controller
— Section 5 MSCI (Multiprotocol Serial Communication Interface)
— Section 6 DMAC (DMA Controller)
— Section 7 Timers
— Section 8 Wait Controller
This section outlines the functions, performance, and internal structure of the SCA.
This section shows the pin arrangements and lists the functions of each pin.
This section describes the operating modes of the chip (reset mode, normal operating mode,
system stop mode), the bus arbiter functions, and the bus interface needed for interfacing with
a host MPU.
This section describes the SCA's interrupt control logic, on-chip interrupt sources, vector
output (fixed and modified vectoring), and acknowledge cycle.
This section gives a general description of the asynchronous, byte-synchronous, and bit-
synchronous communication protocols supported by the built-in multiprotocol serial
communication interfaces (MSCI channels 0 and 1) that implement the main functions of the
SCA, and shows the register settings for various communication functions.
This section explains the single- and chained-block transfer modes supported by the built-in
direct memory access controller (DMAC channels 0 to 3). Internal register functions and
settings are also described.
This section explains operating modes and register settings of the built-in timers (channels
0 to 3), which generate internal interrupts.
This section describes the built-in wait controller, which inserts wait states during memory
access to one of three physical address spaces. Details about the associated internal registers
and WAIT pin are also provided.
How to Use This Manual
Rev. 0, 07/98, page iii of 11

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