HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 193

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Transmission operation starts when a transmit character is written to the transmit buffer in idle
state. The transmit line output changes at the falling edge of the transmit clock pulse as shown in
figures 5.14 (a) and (b). This example uses an 8-bit character, one stop bit, with parity.
A stop bit length of 1, 1.5, or 2 can be specified in 1/16, 1/32, or 1/64 clock mode. In 1/1 clock
mode, only a stop bit length of 1 or 2 is available. Even if 1.5 is specified in this mode, 1 or 2 stop
bits will be used.
"TX reset" or
"channel reset"
issued in any
state
Initialization by reset
transmit state
TX disable
Figure 5.13 State Transition Diagram for Transmission in Asynchronous Mode
Start bit
state
Note: Command names are enclosed in double quotation marks ("").
"TX enable" issued
After
transmission
"TX disable" issued
"TX disable"
issued after transmission
"TX disable" not issued
and data remaining in
transmit buffer
Parity/MP detected
after transmission
transmit state
Data written to transmit buffer
Character
Idle state
transmit state
Parity/MP bit
After transmission
mark transmit
One-bit cycle
No parity/MP
detected after
transmission
"TX disable"
not issued
and no data
remaining in
transmit buffer
after transmission
state
Rev. 0, 07/98, page 177 of 453
No data remaining in transmit
buffer after transmission
Break reset
specified
Data remaining
in transmit buffer
after transmission
Break transmit
transmit state
Stop bit
state
Break transmission
specified in
any state