HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 175

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bits 7 0 (SA07 SA00: Synchronous/Address): The function of these bits is described below.
Table 5.4
Mode
HDLC mode
When using a two-octet SYN character pattern or address, the first and second octets of data must
be set in SA0 and SA1, respectively (figure 5.7).
Figure 5.7 MSCI Synchronous/Address Registers (SA0 and SA1) and Two-Octet Data
Asynchronous mode
Not used
Byte synchronous (mono- or bi-sync) mode
The SA07 SA00 bits specify bits 7 0 of the SYN character pattern for reception in mono-sync
mode, and the low-order eight bits (bits 7 0) of the SYN character pattern for transmission and
reception in bi-sync mode.
Bit synchronous mode
The SA07 SA00 bits set the values shown in table 5.4 according to the address field check
mode selected in HDLC mode. The contents of this register are not used for transmission; the
address must be written in the FIFO.
(1)
Header
SCA register · · · · · · · · · ·
(2)
Header
SCA register · · ·
BOP (dual address)
COP (bi-sync mode)
SA07 SA00 Function in Bit Synchronous Mode
Address Field Check
No address field checked
Single address 1
Single address 2
Dual address
SYN1
Flag
SA0
SYN2
SA0
SA1
A1
SA1
A2
C
Bits 7 0 of SA0
Not used
Bits 7 0 of the secondary station address
Not used
Bits 7 0 of the secondary station address
Data
Rev. 0, 07/98, page 159 of 453
I
FCS
CRC
Flag