HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 137

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

The RX clock source register (RXS) specifies the receive clock source and the baud rate of the
baud rate generator (BRG) in the receiver. For the baud rate generator, see section 5.6, Baud Rate
Generator.
This register is reset under either of the following conditions:
Hardware reset
Channel reset command
Async
Byte sync
Bit sync HDLC
Read/Write
Initial value
Notes:
Receive clock source
000:
010:
100:
110:
111:
Others:
5.2.5
1. Reserved. This bit always reads 0 and must be set to 0.
2. Reserved. When these settings are selected, normal operation is not guaranteed.
RXC line input
RXC line input (noise suppression)
Internal baud rate generator (BRG) output
ADPLL output
(BRG output for ADPLL operating clock)
ADPLL output
(RXC line input for ADPLL operating clock)
Reserved
MSCI RX Clock Source Register (RXS)
—
—
7
0
*1
RXCS2
R/W
*2
6
0
RXCS1
R/W
5
0
RXCS0
R/W
4
0
RXBR3
R/W
3
0
RXBR2
R/W
2
0
Receiver baud rate
• Clock division ratio
0000:
0001:
0010:
0011:
0100:
0101:
0110:
0111:
1000:
1001:
Others:
Rev. 0, 07/98, page 121 of 453
RXBR1
R/W
1/1
1/2
1/4
1/8
1/16
1/32
1/64
1/128
1/256
1/512
1
0
Reserved
RXBR0
R/W
0
0
*2