HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 40

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

1.7.8
The receiver (figure 1.13) converts serial receive data into parallel data according to the selected
communication format. The LSB of the data is received first. The data are shifted through a
succession of receive shift registers, the last of which is the eight-bit receive shift register 4
(figure 1.12).
Rev. 0, 07/98, page 24 of 453
Receive
data
Receiver
Decoder
Internal receive
data (NRZ)
Receive
clock
Figure 1.12 Receive Data Path (in each protocol mode)
abort, or idle detection
Receive shift register 1
abort, or idle detection
Receive shift register 1
Receive shift register 1
Stop bit
Detect parity/MP bit
Zero deletion, flag,
Zero deletion, flag,
and framing errors
Parity/MP bit
Receive shift register 2
Receive shift register 2
Receive shift register 2
Detect SYN character
Detect secondary
Detect secondary
station address
station address
Receive shift register 4
CRC calculator
To receive FIFO
Receive shift register 3
CRC calculator
Receive shift register 4
Receive shift register 4
Receive delay register
To receive FIFO
To receive FIFO
Receive CRC
shift register
8
8
Receive shift register 4
To receive FIFO
BOP
with
CRC
BOP
withou
CRC
COP
Async