HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 177

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HD64570

Manufacturer Part Number
HD64570
Description
Serial Communications Adaptor
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Bits 7 0 (SA17 SA10: Synchronous/Address): The function of these bits is described below.
Table 5.5
Mode
HDLC mode
Asynchronous mode
Not used
Byte synchronous mode
The SA17 SA10 bits specify bits 7 0 of the SYN character pattern for transmission in byte
synchronous mono-sync or byte synchronous external-sync mode, and the high-order eight bits
(bits 15 8) of the SYN character pattern in bi-sync mode.
Bit synchronous mode
The SA17 SA10 bits set the values shown in table 5.5 according to the address field check
mode selected in HDLC mode. The contents of this register are not used for transmission; the
address must be written in the FIFO.
SA17 SA10 Function in Bit Synchronous Mode
Address Field Check
No address field checked
Single address 1
Single address 2
Dual address
Bits 7 0 of SA1
Not used
Not used
Bits 15 8 of the secondary station address
Bits 15 8 of the secondary station address
Rev. 0, 07/98, page 161 of 453

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