HD64570 HITACHI [Hitachi Semiconductor], HD64570 Datasheet - Page 240

• Manufacturer Part Number: HD64570
• Description: Serial Communications Adaptor
• Manufacturer: HITACHI [Hitachi Semiconductor]

Table 5.19 ADPLL Receive Margin (theoretical values; see note 1)
Code Type
NRZ-type
FM-type
Notes: 1. Values in this table are theoretical. They do not guarantee the performance of a device.
Rev. 0, 07/98, page 224 of 453
Ideal
waveform
Actual
waveform
2. The operating mode is the ratio of the ADPLL operating clock frequency to the bit rate,
3. If T
as selected by bits DRATE1 0 in MSCI mode register 2.
second term in the bit rate margin formula can be ignored and the first term can be
used as the average bit rate margin.
RXD
(NRZ-type)
RXD
(FM-type)
RXD
(NRZ-type)
RXD
(FM-type)
0
is sufficiently long in comparison to t
Operating Mode
8
16
32
8
16
32
Figure 5.42 RXD Input Waveform
Bit Margin (t - t
37.5%
43.7%
46.8%
25.0%
37.5%
43.7%
t/2
T
1 bit interval
to/2
To
To
Arbitrary number of bits
T
t
to
0
, then since t
0
)/t
0
Bit Rate Margin (t - t
(12.5 + (t
(6.2 + (t
(3.1 + (t
(12.5 + (t
(6.2 + (t
(3.1 + (t
0
/T
0
is approximately zero, the
0
0
0
0
/T
/T
/T
/T
0
0
/T
/T
0
0
0
0
)
)
)
)
0
0
)
)
43.7) %
46.8) %
37.5) %
43.7) %
37.5) %
25.0) %
0
)/t
0