ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 107
ATxmega128B1
Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128B1
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega128B1-AU
Manufacturer:
TI
Quantity:
90
Company:
Part Number:
ATxmega128B1-U
Manufacturer:
FUJITSU
Quantity:
632
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9.3.2
9.4
9.4.1
9.4.2
8291A–AVR–10/11
Reset Sources
Oscillator Startup
Power-on Reset
Brownout Detection
Whenever a reset occurs, the clock system is reset and the internal 2MHz internal oscillator is
chosen as the source for Clk
After the reset delay, the 2MHz internal oscillator clock is started, and its calibration values are
automatically loaded from the calibration row to the calibration registers.
A power-on reset (POR) is generated by an on-chip detection circuit. The POR is activated when
the V
sequence.
The POR is also activated to power down the device properly when the V
below the V
The V
teristics data.
Figure 9-2.
Figure 9-3.
The on-chip brownout detection (BOD) circuit monitors the V
paring it to a fixed, programmable level that is selected by the BODLEVEL fuses. If disabled,
BOD is forced on at the lowest level during chip erase and when the PDI is enabled.
INTERNAL
INTERNAL
TIME-OUT
TIME-OUT
CC
POT
RESET
RESET
RESET
RESET
rises and reaches the POR threshold voltage (V
level is higher for falling V
V
V
CC
CC
POT
MCU startup, RESET tied to V
MCU startup, RESET extended externally,
level.
V
V
V
SYS
POT
POT
RST
.
t
TOUT
CC
than for rising V
CC
V
.
RST
t
TOUT
CC
Atmel AVR XMEGA B
. Consult the datasheet for POR charac-
POT
CC
), and this will start the reset
level during operation by com-
CC
falls and drops
107
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