ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 402

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.12.3.3
29.12.3.4
29.12.3.5
29.12.3.6
8291A–AVR–10/11
Erase Page Buffer
Load Page Buffer
Erase Page
Write Page
Dedicated read EEPROM, read fuse, read signature row, and read calibration row commands
are also available for the various memory sections. The algorithm for these commands are the
same as for the read NVM command.
The erase flash page buffer and erase EEPROM page buffer commands are used to erase the
flash and EEPROM page buffers.
The BUSY flag in the NVM STATUS register will be set until the operation is completed.
The load flash page buffer and load EEPROM page buffer commands are used to load one byte
of data into the flash and EEPROM page buffers.
Since the flash page buffer is word accessed and the PDI uses byte addressing, the PDI must
write the flash page buffer in the correct order. For the write operation, the low byte of the word
location must be written before the high byte. The low byte is then written into the temporary reg-
ister. The PDI then writes the high byte of the word location, and the low byte is then written into
the word location page buffer in the same clock cycle.
The PDI interface is automatically halted before the next PDI instruction can be executed.
The erase application section page, erase boot loader section page, erase user signature row,
and erase EEPROM page commands are used to erase one page in the selected memory
space.
The BUSY flag in the NVM STATUS register will be set until the operation is finished.
The write application section page, write boot loader section page, write user signature row, and
write EEPROM page commands are used to write a loaded flash/EEPROM page buffer into the
selected memory space.
The BUSY flag in the NVM STATUS register will be set until the operation is finished.
1. Load the NVM CMD register with the read NVM command.
2. Read the selected memory address by executing a PDI read operation.
1. Load the NVM CMD register with the erase flash/EEPROM page buffer command.
2. Set the CMDEX bit in the NVM CTRLA register.
1. Load the NVM CMD register with the load flash/EEPROM page buffer command.
2. Write the selected memory address by doing a PDI write operation.
1. Load the NVM CMD register with erase application section/boot loader section/user
2. Set the CMDEX bit in the NVM CTRLA register.
1. Load the NVM CMD register with write application section/boot loader section/user sig-
2. Write the selected page by doing a PDI write. The page is written by addressing any
signature row/EEPROM page command.
nature row/EEPROM page command.
byte location within the page.
Atmel AVR XMEGA B
402