ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 92

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.10.5
7.10.6
8291A–AVR–10/11
RC32KCAL – 32kHz Oscillator Calibration Register
PLLCTRL – PLL Control Register
This bit is protected by the configuration change protection mechanism. Refer to
Change Protection” on page 12
by a reset.
• Bit 7:0 – RC32KCAL[7:0]: 32.768kHz Internal Oscillator Calibration Register
This register is used to calibrate the 32.768kHz internal oscillator. A factory-calibrated value is
loaded from the signature row of the device and written to this register during reset, giving an
oscillator frequency close to 32.768kHz. The register can also be written from software to cali-
brate the oscillator frequency during normal operation.
• Bit 7:6 – PLLSRC[1:0]: Clock Source
The PLLSRC bits select the input source for the PLL according to
Table 7-9.
Notes:
• Bit 5 – PLLDIV: PLL Divided Output Enable
Setting this bit will divide the output from the PLL by 2.
• Bit 4:0 – PLLFAC[4:0]: Multiplication Factor
These bits select the multiplication factor for the PLL. The multiplication factor can be in the
range of from 1x to 31x.
Bit
+0x04
Read/Write
Initial Value
Bit
+0x05
Read/Write
Initial Value
PLLSRC[1:0]
1. The 32.768kHz TOSC cannot be selected as the source for the PLL. An external clock must be
a minimum 0.4MHz to be used as the source clock.
00
01
10
11
R/W
7
x
PLL Clock Source
R/W
7
0
PLLSRC[1:0]
R/W
6
x
R/W
6
0
Group Configuration
R/W
for details. Once enabled, failure detection can only be disabled
5
x
PLLDIV
R/W
RC32M
5
0
RC2M
XOSC
—
R/W
4
RC32KCAL[7:0]
x
R/W
4
0
R/W
3
x
PLL Input Source
2MHz internal oscillator
Reserved
32MHz internal oscillator
External clock source
R/W
3
0
Atmel AVR XMEGA B
PLLFAC[4:0]
R/W
2
x
R/W
2
0
Table 7-9 on page
R/W
1
x
R/W
(1)
1
0
R/W
0
x
R/W
”Configuration
0
0
92.
RC32KCAL
PLLCTRL
92