ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 164

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.9
13.10 DMA Support
13.11 Timer/Counter Commands
8291A–AVR–10/11
Interrupts and events
Figure 13-17. Port override for timer/counter 0 and 1.
The timer/counter can generate both interrupts and events. The counter can generate an inter-
rupt on overflow/underflow, and each CC channel has a separate interrupt that is used for
compare or capture. In addition, an error interrupt can be generated if any of the CC channels is
used for capture and a buffer overflow condition occurs on a capture channel.
Events will be generated for all conditions that can generate interrupts. For details on event gen-
eration and available events, refer to
The interrupt flags can be used to trigger DMA transactions.
transfer triggers available from the timer/counter and the DMA action that will clear the transfer
trigger. For more details on using DMA, refer to
page
Table 13-2.
A set of commands can be given to the timer/counter by software to immediately change the
state of the module. These commands give direct control of the UPDATE, RESTART, and
RESET signals.
An update command has the same effect as when an update condition occurs. The update com-
mand is ignored if the lock update bit is set.
The software can force a restart of the current waveform period by issuing a restart command. In
this case the counter, direction, and all compare outputs are set to zero.
A reset command will set all timer/counter registers to their initial values. A reset can be given
only when the timer/counter is not running (OFF).
Request
OVFIF/UNFIF
ERRIF
CCxIF
49.
Waveform
DMA request sources.
Acknowledge
DMA controller writes to CNT
DMA controller writes to PER
DMA controller writes to PERBUF
N/A
DMA controller access of CCx
DMA controller access of CCxBUF
CCExEN
”Event System” on page
OUT
”DMAC - Direct Memory Access Controller” on
Atmel AVR XMEGA B
65.
Table 13-2 on page 164
INVEN
Comment
Input capture operation
Output compare operation
OCx
lists the
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