ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 213
ATxmega128B1
Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128B1
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega128B1-AU
Manufacturer:
TI
Quantity:
90
Company:
Part Number:
ATxmega128B1-U
Manufacturer:
FUJITSU
Quantity:
632
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18.3.3
Figure 18-4. OUT transaction.
8291A–AVR–10/11
IDLE
OUT
CONFIG
READ
TOKEN
OUT
ADDRESS
BUSNACK0
STALL &
PIDO/1
SET?
ISO?
OK?
Finally, the setup transaction complete flag (SETUP), data buffer 0 not acknowledge flag
(NACK0), and data toggle flag (TOGGLE) are set, while the remaining flags in the endpoint sta-
tus register (STATUS) are cleared for the addressed input and output endpoints. The setup
transaction complete interrupt flag (SETUPIF) in INTFLAGSBCLR/SET is set. The STALL flag in
the endpoint CTRL register is cleared for the addressed input and output endpoints.
When a SETUP token is detected and the device address of the token packet does not match
that of the endpoint, the packet is discarded, and the USB module returns to idle and waits for
the next token packet.
When an OUT token is detected, the USB module fetches the endpoint CTRL and STATUS reg-
ister data from the addressed output endpoint in its endpoint configuration table. If the endpoint
is disabled, the USB module returns to idle and waits for the next token packet.
The USB module then fetches the endpoint DATAPTR register and waits for a DATA0 or DATA1
packet. If a PID error or any other PID than DATA0 or DATA1 is detected, the USB module
returns to idle and waits for the next token packet.
If the STALL flag in the endpoint CTRL register is set, the incoming data are discarded. If the
endpoint is not isochronous, and the bit stuffing and CRC of the received data are OK, a STALL
handshake is returned to the host, and the STALL interrupt flag is set.
For isochronous endpoints, data from both a DATA0 and DATA1 packet will be accepted. For
other endpoint types, the PID is checked against TOGGLE. If they don't match, the incoming
data are discarded and a NAK handshake is returned to the host. If BUSNACK0 is set, the
incoming data are discarded. The overflow flag (OVF) in the endpoint STATUS register and the
overflow interrupt flag (OVFIF) in the INTFLAGSASET/CLR register are set. If the endpoint is
not isochronous, a NAK handshake is returned to the host.
Yes
Y
No
e
s
Yes
No
No
ADDRESS
MATCH?
STALL?
ISO?
NAK
NAK
N
N
No
o
o
Y
Yes
Y
s e
s e
BUSNACK0
ENDPOINT
SET?
DATA
Yes
DATA
N
o
ENDPOINT?
BIT STUFF
BIT STUFF
STORE
LEGAL
DATA
DATA
N
o
Y
e
s
CRC
CRC
UPDATE
CONFIG
STATUS
STORE
READ
DATA
EP STATUS
ENABLED?
BIT STUFF
BIT STUFF
OK?
OK?
Atmel AVR XMEGA B
N
No
N
o
o
Y
Yes
Yes
e
s
CRC OK?
CRC OK?
PID
No
N
o
Yes
Yes
PID OK?
STALL
ACK
No
Y
e
s
UPDATE
STATUS
213
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