ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 215
ATxmega128B1
Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128B1
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega128B1-AU
Manufacturer:
TI
Quantity:
90
Company:
Part Number:
ATxmega128B1-U
Manufacturer:
FUJITSU
Quantity:
632
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Figure 18-5. IN transaction.
18.4
8291A–AVR–10/11
SRAM Memory Mapping
IDLE
CONFIG
READ
READ
DATA
TOKEN
IN
BUSNACK0 and TRNCOMPL0 are set and TOGGLE is toggled. TRNIF is set and the endpoint's
configuration table address is written to the FIFO if the transcation complete FIFO mode is
enabled.
When an IN token is detected and the device address of the token packet does not match that of
the endpoint, the packet is discarded and the USB module returns to idle and waits for the next
token packet.
The USB module uses internal SRAM to store the:
The endpoint pointer register (EPPTR) is used to set the SRAM address for the endpoint config-
uration table. The USB frame number (FRAMENUM) and transaction complete FIFO (FIFO)
locations are derived from this. The locations of these areas are selectable inside the internal
SRAM.
ADDRESS
BUSNACK0
STALL &
NO ISO?
DATA
SET?
No
No
Figure on page 215
• Endpoint configuration table
• USB frame number
• Transaction complete FIFO
Yes
Yes
ADDRESS
PAYLOAD
MATCH?
ISO?
OK?
No
Yes
N
o
Y
Yes
No
s e
gives the relative memory location of each area.
ENDPOINT
STALL
CRC
NAK
ZLP
ENDPOINT?
LEGAL
ISO?
Yes
N
o
Y
e
No
s
Atmel AVR XMEGA B
CONFIG
READ
ACK
EP STATUS
ENABLED?
SET?
ACK
Yes
N
o
No
Y
e
s
UPDATE
STATUS
215
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