ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 30

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ATxmega128B1

Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128B1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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4.15.3
8291A–AVR–10/11
FUSEBYTE2 – Fuse Byte 2
• Bit 7 – Reserved
This fuse bit is reserved. For compatibility with future devices, always write this bit to one when
this register is written.
• Bit 6 – BOOTRST: Boot Loader Section Reset Vector
This fuse can be programmed so the reset vector is pointing to the first address in the boot
loader flash section. The device will then start executing from the boot loader flash section after
reset.
Table 4-1.
• Bit 5 – TOSCSEL: 32.768kHz Timer Oscillator Pin Selection
This fuse is used to select pin location for the 32.768kHz timer oscillator (TOSC). This fuse is
available on devices where XTAL and TOSC pins by default are shared.
Table 4-2.
Note:
• Bit 4:2 – Reserved
These fuse bits are reserved. For compatibility with future devices, always write these bits to one
when this register is written.
• Bit 1:0 – BODPD[1:0]: BOD Operation in Power-down Mode
These fuse bits set the BOD operation mode in all sleep modes except idle mode. For details on
the BOD and BOD operation modes refer to
Table 4-3.
Bit
+0x02
Read/Write
Initial Value
BODPD[1:0]
BOOTRST
TOSCSEL
0
1
0
1
00
01
10
11
1. See device datasheet for alternate TOSC position.
Boot reset fuse.
TOSCSEL fuse.
BOD operation modes in sleep modes.
R/W
Reset Address
Reset vector = Boot loader reset
Reset vector = Application reset (address 0x0000)
Group Configuration
ALTERNATE
XTAL
7
1
Description
Reserved
BOD enabled in sampled mode
BOD enabled continuously
BOD disabled
BOOTRST
R/W
6
1
(1)
TOSCSEL
R/W
5
1
”Brownout Detection” on page
R/W
4
1
R/W
3
1
Atmel AVR XMEGA B
Description
TOSC1/2 on separate pins
TOSC1/2 shared with XTAL
R/W
2
1
R/W
1
1
BODPD[1:0]
107.
R/W
0
1
FUSEBYTE2
30

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