ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 398

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.11.5.7
29.12 External Programming
8291A–AVR–10/11
Read EEPROM
The BUSY flag in the NVM STATUS register will be set until the operation is finished.
The read EEPROM command is used to read one byte from the EEPROM.
1.
2.
3.
during self-programming.
The data byte read will be available in the NVM DATA0 register.
External programming is the method for programming code and nonvolatile data into the device
from an external programmer or debugger. This can be done by both in-system or in mass pro-
duction programming.
For external programming, the device is accessed through the PDI and PDI controller, and using
either the JTAG or PDI physical connection. For details on PDI and JTAG and how to enable
and use the physical interface, refer to
remainder of this section assumes that the correct physical connection to the PDI is enabled.
Doing this all data and program memory spaces are mapped into the linear PDI memory space.
Figure 29-3 on page 399
space in the device.
Load the NVM CMD register with the read EEPROM command.
Load the NVM ADDR register with the address to read.
Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
shows the PDI memory space and the base address for each memory
”Program and Debug Interface” on page
Atmel AVR XMEGA B
412. The
398