ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 334

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.11 DMA Transfer
25.12 Interrupts and Events
25.13 Calibration
25.14 Synchronous Sampling
8291A–AVR–10/11
In order to achieve n bits of accuracy, the source output resistance, R
the ADC input resistance on a pin:
where the ADC sample time, T
For details on R
datasheet.
The DMA controller can be used to transfer ADC conversion results to memory or other periph-
erals. A new conversion result for the ADC channel can trigger a DMA transaction for the ADC
channel. Refer to
DMA transfers.
The ADC can generate interrupt requests and events. The ADC channel has individual interrupt
settings and interrupt vectors. Interrupt requests and events can be generated when an ADC
conversion is complete or when an ADC measurement is above or below the ADC compare reg-
ister value.
The ADC has built-in linearity calibration. The value from the production test calibration must be
loaded from the signature row and into the ADC calibration register from software to achieve
specified accuracy. User calibration of the linearity is not needed, hence not possible. Offset and
gain calibration must be done in software.
Starting an ADC conversion can cause an unknown delay between the start trigger or event and
the actual conversion since the peripheral clock is faster than the ADC clock. To start an ADC
conversion immediately on an incoming event, it is possible to flush the ADC of all measure-
ments, reset the ADC clock, and start the conversion at the next peripheral clock cycle (which
then will also be the next ADC clock cycle). If this is done, the ongoing conversions in the ADC
will be lost.
The ADC can be flushed from software, or an incoming event can do this automatically. When
this function is used, the time between each conversion start trigger must be longer than the
ADC propagation delay to ensure that one conversion is finished before the ADC is flushed and
the next conversion is started.
It is also important to clear pending events or start ADC conversion commands before doing a
flush. If not, pending conversions will start immediately after the flush.
R
T
source
s
≤
-------------------
2 f ⋅
≤
1
ADC
---------------------------------------------- - R
C
sample
channel
⋅
T
ln
s
”DMAC - Direct Memory Access Controller” on page 49
(
2
, R
n
+
1
switch
)
–
, and C
channel
S
is one-half the ADC clock cycle given by:
–
sample
R
switch
, refer to the ADC electrical characteristic in the device
Atmel AVR XMEGA B
source
, must be less than
for more details on
334