ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 185

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.10.8
14.10.9
8291A–AVR–10/11
INTFLAGS — Interrupt Flag register
LCNT – Low-byte Count register
• Bit 1:0 – CMDEN[1:0]: Command Enable
These bits are used to indicate for which timer/counter the command (CMD) is valid.
Table 14-5.
• Bit 7:4 – LCMPxIF: Compare Channel x Interrupt Flag
The compare interrupt flag (LCMPxIF) is set on a compare match on the corresponding CMP
channel.
For all modes of operation, LCMPxIF will be set when a compare match occurs between the
count register (LCNT) and the corresponding compare register (LCMPx). The LCMPxIF is auto-
matically cleared when the corresponding interrupt vector is executed. The flag can also be
cleared by writing a one to its bit location.
• Bit 3:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 1 – HUNFIF: High-byte Timer Underflow Interrupt Flag
HUNFIF is set on a BOTTOM (underflow) condition. This flag is automatically cleared when the
corresponding interrupt vector is executed. The flag can also be cleared by writing a one to its bit
location.
• Bit 0 – LUNFIF: Low-byte Timer Underflow Interrupt Flag
LUNFIF is set on a BOTTOM (underflow) condition. This flag is automatically cleared when the
corresponding interrupt vector is executed. The flag can also be cleared by writing a one to its bit
location.
• Bit 7:0 – LCNT[7:0]
LCNT contains the eight-bit counter value for the low-byte timer/counter. The CPU and DMA
write accesses have priority over count, clear, or reload of the counter.
Bit
+0x0C
Read/Write
Initial Value
Bit
+0x20
Read/Write
Initial Value
CMD
00
01
10
11
LCMPDIF
R/W
R/W
Command selections.
7
0
7
0
Group Configuration
LCMPCIF
R/W
R/W
6
0
6
0
BOTH
HIGH
LOW
—
LCMPBIF
R/W
R/W
5
0
5
0
LCMPAIF
Description
Reserved
Command valid for low-byte T/C
Command valid for high-byte T/C
Command valid for both low-byte and high-byte T/C
R/W
R/W
4
0
4
0
LCNT[7:0]
R/W
R
3
–
0
3
0
Atmel AVR XMEGA B
R/W
R
2
–
0
2
0
HUNFIF
R/W
R/W
1
0
1
0
LUNFIF
R/W
R/W
0
0
0
0
INTFLAGS
LCNT
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