ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 216

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.5
8291A–AVR–10/11
Clock Generation
Figure 18-6. SRAM memory mapping.
The USB module requires a minimum 6MHz clock for USB low speed operation, and a minimum
48MHz clock for USB full speed operation. It can be clocked from internal or external clock
sources by using the internal PLL, or directly from the 32MHz internal oscillator when it is tuned
and calibrated to 48MHz. The CPU and peripherals clocks must run at a minimum of 1.5MHz for
low speed operation, and a minimum of 12MHz for full speed operation.
The USB module clock selection is independent of and separate from the main system clock
selection. Selection and setup are done using the main clock control settings. For details, refer
to
The
”System Clock and Clock Options” on page
(MAXEP+1)*16
Figure 18-7 on page 217
ADDRESS
SRAM
EPPTR +
EPPTR
FIFO
ENDPOINT
DESCRIPTORS
TABLE
FRAME
NUMBER
(MAXEP+1)<<4
shows an overview of the USB module clock selection.
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
EP_ADDRH_MAX
EP_ADDRH_0
FRAMENUMH
EP_ADDRL_0
FRAMENUML
DATAPTRH
AUXDATAL
AUXDATAH
DATAPTRH
AUXDATAL
AUXDATAH
DATAPTRH
AUXDATAL
AUXDATAH
DATAPTRL
DATAPTRL
DATAPTRL
82.
STATUS
STATUS
STATUS
CNTH
CNTH
CNTH
CTRL
CNTL
CTRL
CNTL
CTRL
CNTL
Atmel AVR XMEGA B
ENDPOINT
ENDPOINT
ENDPOINT
MAXEP IN
0 OUT
0 IN
(MAXEP+1) x 4 Bytes
Active when FIFOEN==1
(MAXEP+1) x 16 Bytes
2 Bytes
Active when
STFRNUM==1
216