ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 222

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.10.2
18.10.3
18.11 VBUS Detection
18.12 On-chip Debug
8291A–AVR–10/11
Bus Event Interrupt
Events
The bus event (BUSEVENT) interrupt is used for all interrupts that signal various types of USB
line events or error conditions. These interrupts are related to the USB lines, and are generated
for the USB module and per endpoint. The following eight interrupts use the interrupt vector:
Table 18-2.
The USB module can generate several events, and these are available to the event system,
allowing latency-free signaling to other peripherals or performance analysis of USB operation.
Table 18-3.
Atmel AVR XMEGA devices can use any general purpose I/O pin to implement a VBUS detec-
tion function, and do not use a dedicated VBUS detect pin.
When a break point is reached during on-chip debug (OCD) sessions, the CPU clock can be
below 12MHz. If this happens, the USB module will behave as follows:
USB OCD break mode disabled: The USB module immediately acknowledges any OCD break
request. The USB module will not be able to follow up on transactions received from the USB
host, and its behaviour from the host point of view is not predictable.
USB OCD break mode enabled: The USB module will immediately acknowledge any OCD break
request only if there are no ongoing USB transactions. If there is an ongoing USB transaction,
the USB module will acknowledge any OCD break request only when the ongoing USB transac-
tion has been completed. The USB module will NACK any further transactions received from the
USB host, whether they are SETUP, IN (ISO, BULK), or OUT (ISO, BULK).
Interrupt source
Start of frame (SOFIF)
Suspend (SUSPENDIF)
Resume (RESUMEIF)
Reset (RSTIF)
Isochronous CRC error (CRCIF)
Underflow (UNFIF)
Overflow (OVFIF)
STALL (STALLIF)
Event source
SETUP
Start of Frame
CRC error
Underflow/overflow
Bus event interrupt source.
Event sources.
Description
A SOF token has been received
The bus has been idle for 3ms
A non-idle state is detected when the bus is suspended.
The interrupt is asynchronous and can wake the device from all
sleep modes
A reset condition has been detected on the bus
A CRC or bit-stuff error has been detected in an incoming packet
to an isochronous endpoint
An endpoint is unable to return data to the host
An endpoint is unable to accept data from the host
A STALL handshake has been returned to the host
Description
SETUPIF
SOFIF
CRCIF
UNFIF and OVFIF
Atmel AVR XMEGA B
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