ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 234

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.14.7
18.14.8
8291A–AVR–10/11
AUXDATAL – Auxiliary Data Low
AUXDATAH – Auxiliary Data High
• Bit 15:0 - DPTR[15:8]: Endpoint Data Pointer High
This byte contains the eight msbs of the endpoint data pointer (DATAPTR).
The AUXDATAL and AUXDATAH registers represent the 16-bit value, AUXDATA, that is used
for multipacket transfers.
For IN endpoints, AUXDATA holds the total number of bytes sent. AUXDATA should be written
to zero when setting up a new transfer. For OUT endpoints, AUXDATA holds the total data size
for the complete transfer. This value must be a multiple of the maximum packet size, except for
ISO 1023-byte endpoints.
See
transfers.
• Bit 7:0 – AUXDATA[7:0]: Auxiliary Data Low
This byte contains the eight lsbs of the auxiliary data (AUXDATA). When multipacket transfer is
not used, this SRAM location is free to use for other application data.
• Bit 7:0 – AUXDATA[15:8]: Auxiliary Data High
This byte contains the eight msbs of the auxiliary data (AUXDATA). When multipacket transfer is
not used, this SRAM location is free to use for other application data.
Bit
+0x06
Read/Write
Initial Value
Bit
+0x07
Read/Write
Initial Value
”Multipacket Transfers” on page 218
R/W
R/W
7
X
7
X
R/W
R/W
X
X
6
6
R/W
R/W
X
X
5
5
R/W
R/W
4
X
4
X
for more details on setting up and using multipacket
AUXDATA[15:8]
AUXDATA[7:0]
R/W
R/W
3
X
3
X
Atmel AVR XMEGA B
R/W
R/W
X
X
2
2
R/W
R/W
X
X
1
1
R/W
R/W
0
X
0
X
AUXDATAH
AUXDATAL
234