ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 317

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ATxmega128B1

Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128B1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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24.5.10
8291A–AVR–10/11
CTRLH – Control Register H
Figure 24-11. Segment and Common Terminal Connections for Digit
• Bit 7 – DEC: Decrement of Start Segment
Writing this bit to one automatically decrements the STSEG bit-field of CTRLG register by the
number of segment terminals used by the digit. If this bit is written to zero, the STSEG bit-field is
incremented by the number of segment terminals used by the digit. This action takes place once
the digit decoding is finished and prepares the next call to the Digit Decoder.
• Bits 6:0 – DCODE[6:0]: Display Code
DCODE bit-field will be computed by the Digit Decoder, and converted to display codes, and
then automatically written into the Display Memory according to the STSEG value. This Digit
Decoder can be used when the LCD panel is defined with one or more of the configurations
above in
The
DCODE[6:0] and display pattern.
The table entry code, DCODE [6:0], is the 7-bit ASCII code of the digit.
Bit
+0x09
Read/Write
Initial Value
Table 24-12 on page
e
e
f
f
Figure 24-11 on page
g
l
j
DEC
R/W
m
a
g
d
a
d
7
0
h
k
n
i
c
b
c
b
R/W
6
0
7-segment with 3 COM
SEGn :
SEGn+1 : a, d, g
SEGn+2 : e, f
COM0 :
COM1 :
COM2 :
14-segment with 4 COM
SEGn :
SEGn+1 : d, e, f
SEGn+2 : a, b, c
SEGn+3 : g, j, l, m
COM0 :
COM1 :
COM2 :
COM3 :
318,
Table 24-13 on page 319
b, c
a, b, f
c, e, g
d
h, i, k, n
a, g, h
b, i, j, f
c, e, k, l
d, m, n
317.
R/W
5
0
R/W
4
0
DCODE[6:0]
R/W
e
h
g
f
3
0
Atmel AVR XMEGA B
n
i
a
f
and
l
a
g
d
o
j
Table 24-14 on page 320
m
e
R/W
b
k
p
2
0
d
b
c
c
7-segment with 4 COM
SEGn :
SEGn+1 : d, e, f, g
COM0 :
COM1 :
COM2 :
COM3 :
16-segment with 3 COM
SEGn :
SEGn+1 : a, i, l
SEGn+2 : b, k, m
SEGn+3 : c, d, e
SEGn+4 : j, o, p
SEGn+5 : f
COM0 :
COM1 :
COM2 :
R/W
1
0
a, f
b, g
c, e
d
h, a, b, c, j
g, i, k, d, o
n, l, m, p, e, f
a, b, c
h, g, n
R/W
0
0
show the
CTRLH
317

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