ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 197
ATxmega128B1
Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128B1
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega128B1-AU
Manufacturer:
TI
Quantity:
90
Company:
Part Number:
ATxmega128B1-U
Manufacturer:
FUJITSU
Quantity:
632
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15.7.5
15.7.6
15.7.7
8291A–AVR–10/11
DTBOTH – Dead-time Concurrent Write to Both Sides
DTBOTHBUF – Dead-time Concurrent Write to Both Sides Buffer register
DTLS – Dead-time Low Side register
• Bit 2 – FDF: Fault Detect Flag
This flag is set when a fault detect condition is detected; i.e., when an event is detected on one
of the event channels enabled by FDEVMASK. This flag is cleared by writing a one to its bit
location.
• Bit 1 – DTHSBUFV: Dead-time High Side Buffer Valid
If this bit is set, the corresponding DT buffer is written and contains valid data that will be copied
into the DTLS register on the next UPDATE condition. If this bit is zero, no action will be taken.
The connected timer/counter unit’s lock update (LUPD) flag also affects the update for dead-
time buffers.
• Bit 0 – DTLSBUFV: Dead-time Low Side Buffer Valid
If this bit is set, the corresponding DT buffer is written and contains valid data that will be copied
into the DTHS register on the next UPDATE condition. If this bit is zero, no action will be taken.
The connected timer/counter unit's lock update (LUPD) flag also affects the update for dead-
time buffers.
• Bit 7:0 – DTBOTH: Dead-time Both Sides
Writing to this register will update the DTHS and DTLS registers at the same time (i.e., at the
same I/O write access).
• Bit 7:0 – DTBOTHBUF: Dead-time Both Sides Buffer
Writing to this memory location will update the DTHSBUF and DTLSBUF registers at the same
time (i.e., at the same I/O write access).
Bit
+0x07
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
R/W
R/W
R/W
7
0
7
0
7
0
R/W
R/W
R/W
6
0
6
0
6
0
R/W
R/W
R/W
5
0
5
0
5
0
R/W
DTBOTHBUF[7:0]
R/W
R/W
4
0
4
0
4
0
DTBOTH[7:0]
DTLS[7:0]
R/W
3
0
R/W
R/W
3
0
3
0
Atmel AVR XMEGA B
R/W
2
0
R/W
R/W
2
0
2
0
R/W
1
0
R/W
R/W
1
0
1
0
R/W
0
0
R/W
R/W
0
0
0
0
DTBOTHBUF
DTBOTH
DTLS
197
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