ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 225

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.13.4
18.13.5
18.13.6
8291A–AVR–10/11
ADDR – Address register
FIFOWP – FIFO Write Pointer register
FIFORP – FIFO Read Pointer register
• Bit 7 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write
this bit to zero when this register is written.
• Bit 6:0 – ADDR[6:0]: Device Address
These bits contain the USB address the device will respond to.
• Bit 7:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 4:0 – FIFOWP[4:0]: FIFO Write Pointer
These bits contain the transaction complete FIFO write pointer. This register must be read only
by the CPU or DMA controller. Writing this register will flush the FIFO write and read pointers.
• Bit 7:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 4:0 – FIFORP[4:0]: FIFO Read Pointer
These bits contain the transaction complete FIFO read pointer. This register must only be read
by the CPU or DMA controller. Writing this register will flush the FIFO write and read pointer.
Bit
+0x03
Read/Write
Initial Value
Bit
+0x04
Read/Write
Initial Value
Bit
+0x05
Read/Write
Initial Value
7
–
R
0
7
–
R
0
7
–
R
0
R/W
–-
R
R
6
0
6
0
6
–
0
R/W
–-
R
R
5
0
5
0
5
–
0
R/W
R/W
R/W
4
0
4
0
4
0
ADDR[6:0]
R/W
R/W
R/W
3
0
3
0
3
0
Atmel AVR XMEGA B
FIFOWP[4:0]
FIFORP[4:0]
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
R/W
R/W
R/W
0
0
0
0
0
0
FIFOWP
FIFORP
ADDR
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