ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 338

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.15.4
8291A–AVR–10/11
EVCTRL – Event Control register
• Bits 6:4 – REFSEL[2:0]: Reference Selection
These bits selects the reference for the ADC according to
Table 25-3.
• Bit 3:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 1 – BANDGAP: Bandgap Enable
Setting this bit enables the bandgap for ADC measurement. Note that if any other functions are
already using the bandgap, this bit does not need to be set when the internal 1.00V reference is
used for another ADC or if the brownout detector is enabled.
• Bit 0 – TEMPREF: Temperature Reference Enable
Setting this bit enables the temperature sensor for ADC measurement.
• Bit 7:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 4:3 – EVSEL[1:0]: Event Channel Input Select
These bits select which event channel will trigger the ADC channel. Each setting defines a group
of event channels, where the event channel with the lowest number will trigger ADC channel 0,
the next event channel will trigger ADC channel 1, and so on. See
Table 25-4.
Bit
+0x03
Read/Write
Initial Value
REFSEL[2:0]
EVSEL[1:0]
101 - 111
000
001
010
011
100
00
01
10
11
R
7
–
0
ADC reference selection.
ADC event channel select.
R
6
–
0
Group Configuration
INT1V
INTVCC
AREFA
AREFB
INTVCC2
Group Configuration
R
5
–
0
0
1
2
3
R/W
4
0
EVSEL[1:0]
Selected Event Lines
Event channel 0 selected inputs
Event channel 1 selected inputs
Event channel 2 selected inputs
Event channel 3 selected inputs
Description
10/11 of bandgap (1.0V)
V
External reference from AREF pin on PORT A
External reference from AREF pin on PORT B
V
Reserved
CC
CC
R/W
3
0
/1.6
/2
Atmel AVR XMEGA B
Table 25-3 on page
R/W
2
0
Table 25-4 on page
EVACT[2:0]
R/W
1
0
338.
R/W
0
0
338.
EVCTRL
338