ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 236

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.16 Register Summary – USB Module
18.17 Register Summary – USB Endpoint
18.18 Register Summary – Frame
18.19 USB Interrupt Vector Summary
Table 18-6.
8291A–AVR–10/11
Address
Address
+0x10-0X39
Address
+0x00
+0x01
+0x0C
+0x0D
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
+0x08
+0x09
+0x0A
+0x0B
+0x0E
+0x0F
+0x3A
+0x3B
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
Offset
0x00
0x02
Name
FRAMENUMH
FRAMENUML
Name
CTRLA
CTRLB
STATUS
ADDR
FIFOWP
FIFORP
EPPTRL
EPPTRH
INTCTRLA
INTCTRLB
INFLAGSACLR
INFLAGSASET
INFLAGSBCLR
INFLAGSBSET
Reserved
Reserved
Reserved
CALL
CALH
Name
DATAPTRH
AUXDATAH
DATAPTRL
AUXDATAL
USB interrupt vectors and their word offset addresses.
STATUS
CNTH
CTRL
CNTL
TRNCOMPL_vect
BUSEVENT_vect
Source
FRAMEERR
The address to the first configuration byte is (EPPTR[15:0] + 16 × endpoint address) for OUT
endpoints and (EPPTR[15:0] + 16 × endpoint address + 8) for IN endpoints.
STALL
The address to the frame configuration byte is (MAXEP + 1) << 4. For instance with MAXEP = 3,
the first address would be located at offset address 0x40.
Bit 7
AZLP
CRC
Bit 7
ENABLE
SOFIE
Bit 7
SOFIF
SOFIF
–
–
–
–
–
–
–
–
–
–
–
TYPE[1:0]
OVF/UNF
Bit 6
SUSPENDIF
SUSPENDIF
Bit 6
–
Interrupt Description
SOF, suspend, resume, bus reset, CRC, underflow, overflow, and stall error interrupts
Transaction complete interrupt
BUSEVIE
SPEED
–
Bit 6
–
–
–
–
–
–
–
–
–
–
TRNCOMPL0
MULTIPKT
Bit 5
Bit 5
–
BUSERRIE
RESUMEIF
RESUMEIF
FIFOEN
–
Bit 5
–
–
–
–
–
–
–
–
–
–
TRNCOMPL1
PINGPONG
SETUP
Bit 4
Bit 4
STFRNUM
–
PULLRST
STALLIE
–
Bit 4
RSTIF
RSTIF
AUXDATA[15:8]
FRAMENUM[7:0]
DATAPTR[15:8]
DATAPTR[7:0]
AUXDATA[7:0]
–
–
–
–
–
–
–
CNT[7:0]
EPPTR[15:8]
EPPTR[7:0]
CAL[15:8]
CAL[7:0]
INTDSBL
Bit 3
BANK
UPRESUME
Bit 3
–
ADDR[6:0]
–
CRCIF
CRCIF
Bit 3
–
–
–
–
–
–
–
–
BUSNACK1
Bit 2
STALL
Atmel AVR XMEGA B
–
Bit 2
RWAKEUP
FIFOWP[4:0]
FIFORP[4:0]
RESUME
UNFIF
UNFIF
Bit 2
–
–
–
–
–
–
–
MAXEP[3:0]
FRAMENUM[10:8]
BUFSIZE[2:0]
BUSNACK0
Bit 1
Bit 1
SUSPEND
GNACK
Bit 1
TRNIE
OVFIF
OVFIF
TRNIF
TRNIF
BUFSIZE[1:0]
–
–
–
CNT[9:8]
INTLVL[1:0]
TOGGLE
Bit 0
Bit 0
SETUPIE
SETUPIF
SETUPIF
BUSRST
ATTACH
STALLIF
STALLIF
Bit 0
–
–
–
Isochromous
Isochromous
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