ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 316

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ATxmega128B1

Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128B1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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24.5.9
8291A–AVR–10/11
CTRLG – Control Register G
• Bits 7:6 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bits 5:0 – FCONT[5:0]: Fine Contrast
FCONT bit-field defines the maximum voltage clk
signed number (two's complement). New values take effect at the beginning of each frame.
• Bits 7:6 – TDG[1:0]: Type of Digit
This bit-field specifies the number of segments and segment/common connections used to dis-
play a digit. See
Table 24-11. Type of Digit
Note:
• Bits 5:0 – STSEG[5:0]: Start Segment
STSEG bit-field defines the first segment terminal used to write the decoded display. This bit-
field is automatically incremented or decremented (according to the DEC value of CTRLH regis-
ter) by the number of segment terminals used in the digit.
Bit
+0x08
Read/Write
Initial Value
TDG[1:0]
0 0
0 1
1 0
1 1
1. Refer to specific device datasheet for “Type of Digit” availability.
R/W
7
0
Digit Type
7-segment with 3 common terminals, COM[2:0]
7-segment with 4 common terminals, COM[3:0]
14-segment with 4 common terminals, COM[3:0]
16-segment with 3 common terminals, COM[2:0]
Table 24-11
TDG[1:0]
V
R/W
LCD
6
0
= 3.0 V + ( FCONT[5:0] x 0.016 V )
and
R/W
Figure 24-11
5
0
(1)
R/W
4
0
below.
LCD
R/W
on segment and common pins. FCONT is a
3
0
STSEG[5:0]
Atmel AVR XMEGA B
R/W
2
0
R/W
1
0
R/W
0
0
CTRLG
316

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