ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 136

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ATxmega128B1

Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128B1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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12.9
12.10 Clock and Event Output
8291A–AVR–10/11
Slew Rate Control
Figure 12-10. Port override signals and related logic.
Slew rate control can be enabled for all I/O pins individually. Enabling the slew rate limiter will
typically increase the rise/fall time by 50% to 150%, depending on operating conditions and load.
For information about the characteristics of the slew rate limiter, please refer to the device
datasheet.
It is possible to output the peripheral clock and event channel 0 events to a pin. This can be
used to clock, control, and synchronize external functions and hardware to internal device tim-
ing. The output port pin is selectable. If an event occurs, it remains visible on the port pin as long
as the event lasts; normally one peripheral clock cycle.
PINnCTRL
D
D
D
Q
OUTn
DIRn
INn
R
R
R
R
Synchronizer
Analog Input/Output
Q
Q
Q
D
Digital Input Pin
Q
OUT Override Value
OUT Override Enable
DIR Override Value
DIR Override Enable
R
C
o
n
o
L
o
g
c
t
r
l
i
D
Pull Enable
Pull Keep
Pull Direction
Digital Input Disable (DID)
Wired AND/OR
Slew Rate Limit
Inverted I/O
DID Override Value
DID Override Enable
Atmel AVR XMEGA B
Pxn
136

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