ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 394

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.11.3
Table 29-3.
29.11.3.1
29.11.3.2
8291A–AVR–10/11
CMD[6:0]
0x00
Fuses and Lock Bits
0x07
0x08
NVM Fuse and Lock Bit Commands
Group Configuration
NO_OPERATION
READ_FUSES
WRITE_LOCK_BITS
Write Lock Bits
Read Fuses
Fuse and lock bit commands.
The destination register will be loaded during the execution of the LPM instruction.
To ensure that LPM for reading flash will be executed correctly it is adviced to disable interrupt
while using either of these commands.
The NVM flash commands that can be used for accessing the fuses and lock bits are listed in
Table
For self-programming of the fuses and lock bits, the trigger for action-triggered commands is to
set the CMDEX bit in the NVM CTRLA register (CMDEX). The read-triggered commands are
triggered by executing the (E)LPM instruction (LPM). The write-triggered commands are trig-
gered by a executing the SPM instruction (SPM).
The Change Protected column indicates whether the trigger is protected by the configuration
change protection (CCP) during self-programming or not. The last two columns show the
address pointer used for addressing and the source/destination data register.
Section 29.11.3.1 on page 394
rithm for each NVM operation.
The write lock bits command is used to program the boot lock bits to a more secure settings from
software.
1.
2.
3.
during self-programming.
The BUSY flag in the NVM STATUS register will be set until the command is finished. The CPU
is halted during the complete execution of the command.
This command can be executed from both the boot loader section and the application section.
The EEPROM and flash page buffers are automatically erased when the lock bits are written.
The read fuses command is used to read the fuses from software.
1.
1. Load the Z-pointer with the byte address to read.
2. Load the NVM CMD register with the read user signature row / calibration row
3. Execute the LPM instruction.
command
Load the NVM DATA0 register with the new lock bit value.
Load the NVM CMD register with the write lock bit command.
Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
Load the NVM ADDR register with the address of the fuse byte to read.
29-3.
Description
No operation
Read fuses
Write lock bits
through
Trigger
CMDEX
CMDEX
Section 29.11.3.2 on page 394
-
CPU
Halted
Y
N
-
Atmel AVR XMEGA B
Change
Protected
N
Y
-
NVM
Busy
Y
Y
explain in detail the algo-
-
Address
Pointer
ADDR
ADDR
-
Data
Registe
r
DATA
-
-
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