ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 302

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

24.2.1
24.2.2
24.2.3
24.2.4
8291A–AVR–10/11
Definitions
LCD Clock Sources
LCD Prescaler
LCD Display Memory
Several terms are used when describing LCD. The definitions in
this document.
Table 24-1.
Figure 24-1. LCD Typical Connections
The LCD controller can be clocked by an internal or an external asynchronous 32kHz clock
source. This 32kHz oscillator source selection is the same as for the Real Time Counter, RTC-
SRC bit-field in RTC control register (see
The clock source must be stable to obtain accurate LCD timing and hence minimize DC voltage
offset across LCD segments.
The prescaler consists of a 3-bit ripple counter and a 1 to 8-clock divider (see
page
If a finer resolution in frame rate is required, the CLKDIV bit-field can be used to divide the clock
further by 1 to 8.
Output from the clock divider
The Display Memory is available through I/O registers grouped for each common terminal.
COM0
COM1
LCD
Segment (or pixel)
COM
SEG
1 / Duty
1 / Bias
Frame Rate
303). The PRESC bit selects clk
Common
Common
Terminal 0
Terminal 1
Segment
SEG0
Terminal 0
LCD Definitions
A passive display panel with terminals leading directly to a segment
A LCD panel active area within the display which can be turned “ON or “OFF”.
This can be a single segment of a 7-segment character or a specific symbol
(icon).
Common terminal
Segment terminal
1 / Number of common terminals on an actual LCD display
1 / Number of voltage levels used driving a LCD display -1
Number of times the LCD segments are energized per second
Segment
SEG1
Terminal 1
clk
LCD_PS
Segment
SEG2
Terminal 2
LCD
is used as clock source for the LCD timing.
Table 7-4 on page
divided by 8 or 16 from the ripple counter.
Segment
SEG3
Terminal 3
Atmel AVR XMEGA B
87).
Table 24-1
are used throughout
Figure 24-2 on
302