ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 200

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ATxmega128B1

Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128B1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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16. Hi-Res – High-Resolution Extension
16.1
16.2
8291A–AVR–10/11
Features
Overview
The high-resolution (hi-res) extension can be used to increase the resolution of the waveform
generation output from a timer/counter by four or eight. It can be used for a timer/counter doing
frequency, single-slope PWM, or dual-slope PWM generation. It can also be used with the
AWeX if this is used for the same timer/counter.
The hi-res extension uses the peripheral 4x clock (Clk
be configured so the peripheral 4x clock frequency is four times higher than the peripheral and
CPU clock frequency when the hi-res extension is enabled. Refer to
and Prescalers” on page 86
Figure 16-1. Timer/counter operation with hi-res extension enabled.
When the hi-res extension is enabled, the timer/counter must run from a non-prescaled periph-
eral clock. The timer/counter will ignore its two least-significant bits (lsb) in the counter, and
counts by four for each peripheral clock cycle. Overflow/underflow and compare match of the 14
most-significant bits (msb) is done in the timer/counter. Count and compare of the two lsb is han-
dled and compared in the hi-res extension running from the peripheral 4x clock.
The two lsb of the timer/counter period register must be set to zero to ensure correct operation.
If the count register is read from the application code, the two lsb will always be read as zero,
since the timer/counter run from the peripheral clock. The two lsb are also ignored when gener-
ating events.
When the hi-res plus feature is enabled, the function is the same as with the hi-res extension,
but the resolution will increase by eight instead of four. This also means that the 3 lsb are han-
dled by the hi-res extension instead of 2 lsb, as when only hi-res is enabled. The extra resolution
is achieved by counting on both edges of the peripheral 4x clock.
Increases waveform generator resolution up to 8x (3 bits)
Supports frequency, single-slope PWM, and dual-slope PWM generation
Supports the AWeX when this is used for the same timer/counter
PER[15:2]
CCxBUF[15:0]
CNT[15:2]
CCx[15:2]
=
" match"
for more details.
[1:0]
BOTTOM
= 0
0
0
2
Time /Counter
Generation
Waveform
=
TOP
2
AWeX
PER4
Dead - Time
Atmel AVR XMEGA B
Insertion
). The system clock prescalers must
clk
PER
Generation
Protection
Pattern
”System Clock Selection
Fault
2
clk
HiRes
PER4
Pxn
200

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