ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 387

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.8
29.9
29.10 CRC Functionality
29.11 Self-programming and Boot Loader Support
29.11.1
8291A–AVR–10/11
Protection of NVM
Preventing NVM Corruption
Flash Programming
Alternative 1:
Alternative 2:
To protect the flash and EEPROM memories from write and/or read, lock bits can be set to
restrict access from external programmers and the application software. Refer to
Lock Bit register” on page 30
During periods when the V
result from a flash memory write can be corrupt, as supply voltage is too low for the CPU and
the flash to operate properly.To ensure that the voltage is sufficient enough during a complete
programming sequence of the flash memory, a voltage detector using the POR threshold
(V
(BOD) is automatically enabled at its configured level.
Depending on the programming operation, if any of these Vcc voltage levels are reached, the
programming sequence will be aborted immediately. If this happens, the NVM programming
should be restarted when the power is sufficient again, in case the write sequence failed or only
partly succeeded.
It is possible to run an automatic cyclic redundancy check (CRC) on the flash program memory.
When NVM is used to control the CRC module, an even number of bytes are read, at least in the
flash range mode. If the user selects a range with an odd number of bytes, an extra byte will be
read, and the checksum will not correspond to the selected range.
Refer to
Reading and writing the EEPROM and flash memory from the application software in the device
is referred to as self-programming. A boot loader (application code located in the boot loader
section of the flash) can both read and write the flash program memory, user signature row, and
EEPROM, and write the lock bits to a more secure setting. Application code in the application
section can read from the flash, user signature row, calibration row, and fuses, and read and
write the EEPROM.
The boot loader support provides a real read-while-write self-programming mechanism for
uploading new program code by the device itself. This feature allows flexible application soft-
ware updates controlled by the device using a boot loader application that reside in the boot
loader section in the flash. The boot loader can use any available communication interface and
associated protocol to read code and write (program) that code into the flash memory, or read
• Fill the EEPROM page buffer with the selected number of bytes
• Perform a EEPROM page erase
• Perform a EEPROM page write
• Fill the EEPROM page buffer with the selected number of bytes
• Perform an atomic EEPROM page erase and write
POT+
) level is enabled. During chip erase and when the PDI is enabled the brownout detector
”CRC - Cyclic Redundancy Check” on page 326
CC
for details on the available lock bit settings and how to use them.
voltage is below the minimum operating voltage for the device, the
Atmel AVR XMEGA B
for more details.
”LOCKBITS –
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