ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 94

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.11.2
7.11.3
8291A–AVR–10/11
CALA – Calibration Register A
CALB – Calibration Register B
The CALA and CALB registers hold the 13-bit DFLL calibration value that is used for automatic
run-time calibration of the internal oscillator. When the DFLL is disabled, the calibration registers
can be written by software for manual run-time calibration of the oscillator. The oscillators will
also be calibrated according to the calibration value in these registers when the DFLL is
disabled.
• Bit 7 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write
this bit to zero when this register is written.
• Bit 6:0 – CALA[6:0]: DFLL Calibration Bits
These bits hold the part of the oscillator calibration value that is used for automatic runtime cali-
bration. A factory-calibrated value is loaded from the signature row of the device and written to
this register during reset, giving an oscillator frequency approximate to the nominal frequency for
the oscillator. The bits cannot be written when the DFLL is enabled.
• Bit 7:6 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 5:0 – CALB[5:0]: DFLL Calibration bits
These bits hold the part of the oscillator calibration value that is used to select the oscillator fre-
quency. A factory-calibrated value is loaded from the signature row of the device and written to
this register during reset, giving an oscillator frequency approximate to the nominal frequency for
the oscillator. These bits are not changed during automatic run-time calibration of the oscillator.
The bits cannot be written when the DFLL is enabled. When calibrating to a frequency different
from the default, the CALA bits should be set to a middle value to maximize the range for the
DFLL.
Bit
+0x02
Read/Write
Initial Value
Bit
+0x03
Read/Write
Initial Value
7
–
R
0
R
7
–
0
R/W
6
x
R
6
–
0
R/W
R/W
5
x
5
x
R/W
R/W
4
x
4
x
CALA[6:0]
R/W
R/W
3
x
3
x
CALB[5:0]
Atmel AVR XMEGA B
R/W
R/W
2
x
2
x
R/W
R/W
1
x
1
x
R/W
R/W
0
x
0
x
CALA
CALB
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