ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 231

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.14.2
8291A–AVR–10/11
CTRL – Control
• Bit 3 – BANK: Bank Select Flag
When ping-pong mode is enabled, this bit indicates which bank will be used for the next transac-
tion. BANK is toggled each time a transaction has completed successfully. This bit is not sed
when ping-pong is disabled. This flag is cleared by writing a one to its bit location.
• Bit 2 – BUSNACK1 : Data Buffer 1 Not Acknowledge Flag
When this flag is set, the USB module will discard incoming data to data buffer 1 in an OUT
transaction, and will not return any data from data buffer 1 in an IN transaction. For control, bulk,
and interrupt endpoints, a NAK handshake is returned. This flag is cleared by writing a one to its
bit location.
• Bit 1 – BUSNACK0 : Data Buffer 0 Not Acknowledge Flag
When this flag is set, the USB module will discard incoming data to data buffer 0 in an OUT
transaction, and will not return any data from data buffer 0 in an IN transaction. For control, bulk,
and interrupt endpoints, a NAK handshake is returned. This flag is cleared by writing a one to its
bit location.
• Bit 0 – TOGGLE : Data Toggle Flag
This indicates if a DATA0 or DATA1 PID is expected in the next data packet for an output end-
point, and if a DATA0 or DATA1 PID will be sent in the next transaction for an input endpoint.
This bit has no effect for isochronous endpoints, where both DATA0 and DATA1 PIDs are
accepted for output endpoint, and only DATA0 PIDs are sent for input endpoints.
Note:
• Bit 7:6 – TYPE[1:0]: Endpoint Type
These bits are used to enable and select the endpoint type. If the endpoint is disabled, the
remaining seven endpoint configuration bytes are never read or written by the USB module, and
their SRAM locations are free to use for other application data.
Table 18-4.
• Bit 5 – MULTIPKT: Multipacket Transfer Enable
Setting this bit enables multipacket transfers. Multipacket transfer enables a data payload
exceeding the maximum packet size of an endpoint to be transferred as multiple packets without
Bit
+0x01
Read/Write
Initial Value
TYPE[1:0]
1. For isochronous endpoints.
00
01
10
11
R/W
7
0
Endpoint type.
TYPE[1:0]
R/W
DISABLE
CONTROL
BULK
ISOCHRONOUS
Group Configuration
6
0
MULTIPKT
R/W
5
0
PINGPONG
R/W
4
0
Description
Endpoint enabled
Control
Bulk/interrupt
Isochronous
INTDSBL
R/W
3
0
Atmel AVR XMEGA B
STALL
R/W
2
0
SIZE[2:0]
R/W
1
0
SIZE[1:0]
(1)
R/W
0
0
CTRL
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