ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 176

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14. TC2 –16-bit Timer/Counter Type 2
14.1
14.2
8291A–AVR–10/11
Features
Overview
•
•
•
•
•
•
•
A timer/counter 2 is realized when a timer/counter 0 is set in split mode. It is a system of two
eight-bit timer/counters, each with four compare channels. This results in eight configurable
pulse width modulation (PWM) channels with individually controlled duty cycles, and is intended
for applications that require a high number of PWM channels.
The two eight-bit timer/counters in this system are referred to as the low-byte timer/counter and
high-byte timer/counter, respectively. The difference between them is that only the low-byte
timer/counter can be used to generate compare match interrupts, events and DMA triggers.
The two eight-bit timer/counters have a shared clock source and separate period and compare
settings. They can be clocked and timed from the peripheral clock, with optional prescaling, or
from the event system. The counters are always counting down.
The high resolution (hi-res) extension can be used to increase the waveform output resolution by
up to eight times by using an internal clock source running up to four times faster than the
peripheral clock.
The timer/counter 2 is set back to timer/counter 0 by setting it in normal mode; hence, one
timer/counter can exist only as either type 0 or type 2.
A detailed block diagram of the timer/counter 2 showing the low-byte (L) and high-byte (H)
timer/counter register split and compare modules is shown in
A system of two eight-bit timer/counters
Eight compare channels
Waveform generation
Timer underflow interrupts/events
One compare match interrupt/event per compare channel for the low-byte timer/counter
Can be used with the event system for count control
Can be used to trigger DMA transactions
– Low-byte timer/counter
– High-byte timer/counter
– Four compare channels for the low-byte timer/counter
– Four compare channels for the high-byte timer/counter
– Single slope pulse width modulation
Atmel AVR XMEGA B
Figure 14-1 on page
177.
176