ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 93

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.10.7
7.11
7.11.1
8291A–AVR–10/11
Register Description
DFLLCTRL – DFLL Control Register
CTRL – Control Register
• Bit 7:3 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 2:1 – RC32MCREF[1:0]: 32MHz Oscillator Calibration Reference
These bits are used to select the calibration source for the 32MHz DFLL according to the
7-10 on page
tion, the actual clock source that is selected must enabled and configured for the calibration to
function.
Table 7-10.
• Bit 0 – RC2MCREF: 2MHz Oscillator Calibration Reference
This bit is used to select the calibration source for the 2MHz DFLL. By default, this bit is zero and
the 32.768kHz internal oscillator is selected. If this bit is set to one, the 32.768kHz crystal oscil-
lator on TOSC is selected as the reference. This bit will select only which calibration source to
use for the DFLL. In addition, the actual clock source that is selected must enabled and config-
ured for the calibration to function.
• Bit 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 0 – ENABLE: Enable
Setting this bit enables the DFLL and auto-calibration of the internal oscillator
Bit
+0x06
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
RC32MCREF[1:0]
–
DFLL32M/DFLL2M
00
01
10
11
R
7
–
0
93. These bits will select only which calibration source to use for the DFLL. In addi-
R
7
–
0
32MHz oscillator reference selection.
R
6
–
0
R
6
–
0
Group Configuration
R
5
–
0
5
–
R
0
USBSOF
XOSC32
RC32K
—
4
–
R
0
R
4
–
0
R
3
–
0
R
Description
32.768kHz internal oscillator
32.768kHz crystal oscillator on TOSC
USB start of frame
Reserved
3
–
0
Atmel AVR XMEGA B
R/W
2
0
RC32MCREF[1:0]
R
2
–
0
R/W
1
0
R
1
–
0
RC2MCREF
ENABLE
R/W
R/W
0
0
0
0
DFLLCTRL
CTRL
Table
93