ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 388

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ATxmega128B1

Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128B1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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29.11.1.1
29.11.1.2
8291A–AVR–10/11
Application and Boot Loader Sections
Addressing the Flash
out the program memory code. It has the capability to write into the entire flash, including the
boot loader section. The boot loader can thus modify itself, and it can also erase itself from the
flash if the feature is not needed anymore.
The application and boot loader sections in the flash are different when it comes to self-
programming.
The user signature row section has the same properties as the boot loader section.
Table 29-1.
The Z-pointer is used to hold the flash memory address for read and write access. For more
details on the Z-pointer, refer to
Since the flash is word accessed and organized in pages, the Z-pointer can be treated as having
two sections. The least-significant bits address the words within a page, while the most-signifi-
cant bits address the page within the flash. This is shown in
address in the page (FWORD) is held by the bits [WORDMSB:1] in the Z-pointer. The remaining
bits [PAGEMSB:WORDMSB+1] in the Z-pointer hold the flash page address (FPAGE). Together
FWORD and FPAGE holds an absolute address to a word in the flash.
For flash read operations (ELPM and LPM), one byte is read at a time. For this, the least-signifi-
cant bit (bit 0) in the Z-pointer is used to select the low byte or high byte in the word address. If
this bit is 0, the low byte is read, and if this bit is 1 the high byte is read.
The size of FWORD and FPAGE will depend on the page and flash size in the device. Refer to
each device’s datasheet for details.
Once a programming operation is initiated, the address is latched and the Z-pointer can be
updated and used for other operations.
Section being Addressed during
Programming
Application section
Boot loader section
User signature row section
– When erasing or writing a page located inside the application section, the boot
– When erasing or writing a page located inside the boot loader section, the CPU is
loader section can be read during the operation, and thus the CPU can run and
execute code from the boot loader section
halted during the entire operation, and code cannot execute
Summary of self-programming functionality.
”The X-, Y-, and Z- Registers” on page
Section that can be Read
during Programming
Boot loader section
None
None
Atmel AVR XMEGA B
Figure 29-1 on page
10.
CPU Halted?
No
Yes
Yes
389. The word
388

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