ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 5

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

2.1
Figure 2-1.
8291A–AVR–10/11
PB[0..7]/
PA[0..7]
JTAG
Block Diagram
Atmel AVR XMEGA B block diagram.
PORT A (8)
PORT B (8)
Int. Refs.
Tempref
VCC/10
AREFA
AREFB
ADCA
ADCB
ACA
ACB
EVENT ROUTING NETWORK
Event System
CRC
AES
DES
Controller
Controller
DMA
PORT C (8)
PC[0..7]
BUS Matrix
XTAL1 /
TOSC1
XTAL2 /
TOSC2
PORT R (2)
Flash
PR[0..1]
NVM Controller
DATA BUS
DATA BUS
CPU
SRAM
EVENT ROUTING NETWORK
PORT D (3)
PD[0..2]
Generation
Oscillator
Circuits/
Clock
Prog/Debug
Oscillator
Controller
Controller
Controller
EEPROM
Interrupt
Control
Sleep
OCD
PORT E (8)
PE[0..7]
Real Time
Power / Ground
Digital function
Analog function / Oscillators
Counter
Atmel AVR XMEGA B
TOSC1
TOSC2
JTAG
(Alternate)
PDI
Supervision
POR/BOD &
Watchdog
Watchdog
Oscillator
Generator
To Clock
RESET
Power
Timer
PORT M (8)
PORT G (8)
Programming, debug, test
External clock / Crystal pins
General Purpose I/O
LCD
PORT B
LCD POWER[0..4]
COM[0..3]
SEG[0..23]
SEG[31..24] /
PM[0..7]
SEG[39..32] /
PG[0..7]
RESET /
PDI_CLK
PDI_DATA
VCC
GND
5