ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 389

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.11.2
Table 29-2.
8291A–AVR–10/11
CMD[6:0]
0x00
Flash Page Buffer
0x23
0x26
Flash
0x2B
NVM Flash Commands
Group Configuration
NO_OPERATION
LOAD_FLASH_BUFFER
ERASE_FLASH_BUFFER
ERASE_FLASH_PAGE
Flash self-programming commands .
Figure 29-1. Flash addressing for self-programming.
The NVM commands that can be used for accessing the flash program memory, signature row
and calibration row are listed in
For self-programming of the flash, the trigger for action-triggered commands is to set the
CMDEX bit in the NVM CTRLA register (CMDEX). The read-triggered commands are triggered
by executing the (E)LPM instruction (LPM). The write-triggered commands are triggered by exe-
cuting the SPM instruction (SPM).
The Change Protected column indicates whether the trigger is protected by the configuration
change protection (CCP) or not. This is a special sequence to write/execute the trigger during
self-programming. For more details, refer to
on page
address pointer used for addressing and the source/destination data register.
Section 29.11.1.1 on page 388
algorithm for each NVM operation.
FLASHEND
FPAGE
14. CCP is not required for external programming. The two last columns show the
00
01
02
Description
No operation / read flash
Load flash page buffer
Erase flash page buffer
Erase flash page
PROGRAM MEMORY
Z-Pointer
BIT
PAGE
WITHIN THE FLASH
P
PAGE ADDRESS
A
G
E
M
S
Table
B
through
FPAGE
29-2.
Section 29.11.2.14 on page 393
Trigger
-/(E)LPM
SPM
CMDEX
SPM
”CCP – Configuration Change Protection register”
W
CPU
Halted
O
N/Y
R
-/N
N
N
D
(2)
FWORD
M
Atmel AVR XMEGA B
S
B
WORD ADDRESS
WITHIN A PAGE
NVM
Busy
N
N
Y
Y
INSTRUCTION WORD
1
Change
Protected
0/1
0
PAGE
-/N
N
Y
Y
Low/High Byte select for (E)LPM
explain in detail the
Address
Pointer
-/ Z-pointer
Z-pointer
Z-pointer
Z-pointer
00
01
02
PAGEEND
FWORD
Data
Registe
r
R1:R0
-/Rd
-
-
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