ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 396

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.11.5
Table 29-4.
29.11.5.1
8291A–AVR–10/11
CMD[6:0]
EEPROM Page Buffer
EEPROM
0x00
0x33
0x36
0x32
0x34
0x35
0x30
0x06
NVM EEPROM Commands
Group Configuration
NO_OPERATION
LOAD_EEPROM_BUFFER
ERASE_EEPROM _BUFFER
ERASE_EEPROM_PAGE
WRITE_EEPROM_PAGE
ERASE_WRITE_EEPROM_PAGE
ERASE_EEPROM
READ_EEPROM
Load EEPROM Page Buffer
EEPROM self-programming commands.
When EEPROM memory mapping is enabled, loading a data byte into the EEPROM page buffer
can be performed through direct or indirect store instructions. Only the least-significant bits of
the EEPROM address are used to determine locations within the page buffer, but the complete
memory mapped EEPROM address is always required to ensure correct address mapping.
Reading from the EEPROM can be done directly using direct or indirect load instructions. When
a memory mapped EEPROM page buffer load operation is performed, the CPU is halted for two
cycles before the next instruction is executed.
When the EEPROM is memory mapped, the EEPROM page buffer load and EEPROM read
functionality from the NVM controller are disabled.
The NVM flash commands that can be used for accessing the EEPROM through the NVM con-
troller are listed in
For self-programming of the EEPROM, the trigger for action-triggered commands is to set the
CMDEX bit in the NVM CTRLA register (CMDEX). The read-triggered command is triggered by
reading the NVM DATA0 register (DATA0).
The Change Protected column indicates whether the trigger is protected by the configuration
change protection (CCP) during self-programming or not. CCP is not required for external pro-
gramming. The last two columns show the address pointer used for addressing and the
source/destination data register.
Section 29.11.5.1 on page 396
rithm for each EEPROM operation.
The load EEPROM page buffer command is used to load one byte into the EEPROM page
buffer.
1.
2.
3.
Repeat steps 2-3 until the arbitrary number of bytes are loaded into the page buffer.
Load the NVM CMD register with the load EEPROM page buffer command.
Load the NVM ADDR0 register with the address to write.
Load the NVM DATA0 register with the data to write. This will trigger the command.
Description
No operation
Load EEPROM page buffer
Erase EEPROM page buffer
Erase EEPROM page
Write EEPROM page
Erase and write EEPROM page
Erase EEPROM
Read EEPROM
Table
29-4.
through
Trigger
DATA0
CMDEX
CMDEX
CMDEX
CMDEX
CMDEX
CMDEX
-
Section 29.11.5.7 on page 398
CPU
Halted
N
N
N
N
N
N
N
-
Atmel AVR XMEGA B
Change
Protected
Y
Y
Y
Y
Y
Y
Y
-
NVM
Busy
N
N
Y
Y
Y
Y
Y
explain in detail the algo-
-
Address
Pointer
-
ADDR
-
ADDR
ADDR
ADDR
-
ADDR
Data
Registe
r
DATA0
DATA0
-
-
-
-
-
-
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