ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 24

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ATxmega128B1

Manufacturer Part Number
ATxmega128B1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128B1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
53
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
10
Input Capture Channels
10
Pwm Channels
10
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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4.11
4.12
4.13
8291A–AVR–10/11
Device ID and Revision
JTAG Disable
I/O Memory Protection
Each device has a three-byte device ID. This ID identifies Atmel as the manufacturer of the
device and the device type. A separate register contains the revision number of the device.
It is possible to disable the JTAG interface from the application software. This will prevent all
external JTAG access to the device until the next device reset or until JTAG is enabled again
from the application software. As long as JTAG is disabled, the I/O pins required for JTAG can
be used as normal I/O pins.
Some features in the device are regarded as critical for safety in some applications. Due to this,
it is possible to lock the I/O register related to the clock system, the event system and the
advanced waveform extensions. As long as the lock is enabled, all related I/O registers are
locked and they can not be written from the application software. The lock registers themselves
are protected by the configuration change protection mechanism. For details refer to
tion Change Protection” on page
12.
Atmel AVR XMEGA B
”Configura-
24

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