ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 89

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.10
7.10.1
7.10.2
8291A–AVR–10/11
Register Description — Oscillator
CTRL – Control Register
STATUS – Status Register
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 4 – PLLEN: PLL Enable
Setting this bit enables the PLL. Before the PLL is enabled, it must be configured with the
desired multiplication factor and clock source.
• Bit 3 – XOSCEN: External Oscillator Enable
Setting this bit enables the selected external clock source. Refer to
trol Register” on page 90
clock source should be allowed time to stabilize before it is selected as the source for the system
clock.
• Bit 2 – RC32KEN: 32.768kHz Internal Oscillator Enable
Setting this bit enables the 32.768kHz internal oscillator. The oscillator must be stable before it
is selected as the source for the system clock.
• Bit 1 – RC32MEN: 32MHz Internal Oscillator Enable
Setting this bit will enable the 32MHz internal oscillator. The oscillator must be stable before it is
selected as the source for the system clock.
• Bit 0 – RC2MEN: 2MHz Internal Oscillator Enable
Setting this bit enables the 2MHz internal oscillator. The oscillator must be stable before it is
selected as the source for the system clock.
By default, the 2MHz internal oscillator is enabled and this bit is set.
• Bit 7:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 4 – PLLRDY: PLL Ready
This flag is set when the PLL has locked on the selected frequency and is ready to be used as
the system clock source.
Bit
+0x01
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
• Bit 7:5 – Reserved
See ”STATUS – Status Register” on page 89.
R
7
–
0
R
7
–
0
R
6
–
0
R
6
–
0
for details on how to select the external clock source. The external
R
5
–
0
R
5
–
0
PLLRDY
R
PLLEN
4
0
R/W
4
0
See ”STATUS – Status Register” on page 89.
See ”STATUS – Status Register” on page 89.
See ”STATUS – Status Register” on page
See ”STATUS – Status Register” on page 89.
XOSCRDY
XOSCEN
3
R
0
R/W
3
0
Atmel AVR XMEGA B
RC32KRDY
RC32KEN
2
R
0
R/W
2
0
”XOSCCTRL – XOSC Con-
RC32MRDY
RC32MEN
R/W
R
1
0
1
0
RC2MRDY
RC2MEN
R/W
0
1
R
0
0
STATUS
89..
CTRL
89