LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 101

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
Fig 15. Standard I/O pin configuration
as digital output
as analog input
as digital input
pin configured
pin configured
pin configured
8.3.1 Pin function
8.3.2 Pin mode
driver
The FUNC bits in the IOCON registers can be set to GPIO (FUNC = 000) or to a
peripheral function. If the pins are GPIO pins, the GPIOnDIR registers determine whether
the pin is configured as an input or output (see
function, the pin direction is controlled automatically depending on the pin’s functionality.
The GPIOnDIR registers have no effect for peripheral functions.
The MODE bits in the IOCON register allow the selection of on-chip pull-up or pull-down
resistors for each pin or select the repeater mode.
The possible on-chip resistor configurations are pull-up enabled, pull-down enabled, or no
pull-up/pull-down. The default value is pull-up enabled. If the pull-up resistor is enabled
(default), all non-I2C pins are pulled up to 3.3 V (V
The repeater mode enables the pull-up resistor if the pin is at a logic HIGH and enables
the pull-down resistor if the pin is at a logic LOW. This causes the pin to retain its last
known state if it is configured as an input and is not driven externally. The state retention is
open-drain enable
repeater mode
output enable
analog input
data output
All information provided in this document is subject to legal disclaimers.
data input
enable
Rev. 12 — 24 September 2012
Chapter 8: LPC1100XL series: I/O configuration (IOCONFIG)
pull-down enable
pull-up enable
select analog input
Section
DD
V
V
DD
DD
strong
pull-up
strong
pull-down
weak
pull-up
weak
pull-down
= 3.3 V).
12.3.2). For any peripheral
V
ESD
DD
ESD
V
SS
UM10398
© NXP B.V. 2012. All rights reserved.
002aah159
PIN
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