LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 37

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
3.5.31 Start logic reset register 0
3.5.32 Start logic status register 0
Table 37.
Writing a one to a bit in the STARTRSRP0CLR register resets the start logic state. The bit
assignment is identical to
clock edge for registering a start signal. This clock edge (falling or rising) sets the interrupt
for waking up from Deep-sleep mode. Therefore, the start-up logic states must be cleared
before being used.
Table 38.
This register reflects the status of the enabled start signal bits. The bit assignment is
identical to
or not a wake-up signal has been received for a given pin.
Table 39.
Bit
11:0
12
31:13 -
Bit
11:0
12
31:13
Bit
11:0
12
31:13
Symbol
ERPIO0_n
ERPIO1_0
Symbol
SRPIO0_n
SRPIO1_0
-
Symbol
RSRPIO0_n
RSRPIO1_0
-
Start logic signal enable register 0 (STARTERP0, address 0x4004 8204) bit
description
Start logic reset register 0 (STARTRSRP0CLR, address 0x4004 8208) bit
description
Start logic status register 0 (STARTSRP0, address 0x4004 820C) bit description
Table
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36. Each bit (if enabled) reflects the state of the start logic, i.e. whether
Rev. 12 — 24 September 2012
Chapter 3: LPC111x/LPC11Cxx System configuration (SYSCON)
Description
Enable start signal for start logic input PIO0_n: PIO0_11 to
PIO0_0
0 = Disabled
1 = Enabled
Enable start signal for start logic input PIO1_0
0 = Disabled
1 = Enabled
Reserved. Do not write a 1 to reserved bits in this register.
Description
Start signal status for start logic input PIO0_n: PIO0_11 to
PIO0_0
0 = No start signal received.
1 = Start signal pending.
Start signal status for start logic input PIO1_0
0 = No start signal received.
1 = Start signal pending.
Reserved
Description
Start signal reset for start logic input PIO0_n:PIO0_11 to
PIO0_0
0 = Do nothing.
1 = Writing 1 resets the start signal.
Start signal reset for start logic input PIO1_0
0 = Do nothing.
1 = Writing 1 resets the start signal.
Reserved. Do not write a 1 to reserved bits in this register.
Table
36. The start-up logic uses the input signals to generate a
UM10398
© NXP B.V. 2012. All rights reserved.
Reset
value
0x0
0x0
0x0
Reset
value
n/a
n/a
n/a
Reset
value
n/a
n/a
n/a
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