LPC1112FHN33/203,5 NXP Semiconductors, LPC1112FHN33/203,5 Datasheet - Page 70

• Manufacturer Part Number: LPC1112FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 16kB flash up to 4 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1112FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1112
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
Table 55.
UM10398
User manual
Name
IOCON_PIO0_5
IOCON_PIO1_9
IOCON_PIO3_4
IOCON_PIO2_4
IOCON_PIO2_5
IOCON_PIO3_5
IOCON_PIO0_6
IOCON_PIO0_7
IOCON_PIO2_9
IOCON_PIO2_10
IOCON_PIO2_2
IOCON_PIO0_8
IOCON_PIO0_9
IOCON_SWCLK_PIO0_10
IOCON_PIO1_10
IOCON_PIO2_11
IOCON_R_PIO0_11
IOCON_R_PIO1_0
IOCON_R_PIO1_1
IOCON_R_PIO1_2
IOCON_PIO3_0
IOCON_PIO3_1
IOCON_PIO2_3
IOCON_SWDIO_PIO1_3
IOCON_PIO1_4
IOCON_PIO1_11
IOCON_PIO3_2
IOCON_PIO1_5
Register overview: I/O configuration (base address 0x4004 4000)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Address
offset
0x034
0x038
0x03C
0x040
0x044
0x048
0x04C
0x050
0x054
0x058
0x05C
0x060
0x064
0x068
0x06C
0x070
0x074
0x078
0x07C
0x080
0x084
0x088
0x08C
0x090
0x094
0x098
0x09C
0x0A0
Chapter 7: LPC1100/LPC1100C/LPC1100L series: I/O configuration
Rev. 12 — 24 September 2012
Description
I/O configuration for pin PIO0_5/SDA
I/O configuration for pin
PIO1_9/CT16B1_MAT0
I/O configuration for pin PIO3_4
I/O configuration for pin PIO2_4
I/O configuration for pin PIO2_5
I/O configuration for pin PIO3_5
I/O configuration for pin PIO0_6/SCK0
I/O configuration for pin PIO0_7/CTS
I/O configuration for pin PIO2_9
I/O configuration for pin PIO2_10
I/O configuration for pin
PIO2_2/DCD/MISO1
I/O configuration for pin
PIO0_8/MISO0/CT16B0_MAT0
I/O configuration for pin
PIO0_9/MOSI0/CT16B0_MAT1
I/O configuration for pin
SWCLK/PIO0_10/
SCK0/CT16B0_MAT2
I/O configuration for pin
PIO1_10/AD6/CT16B1_MAT1
I/O configuration for pin PIO2_11/SCK0 0xD0
I/O configuration for pin
R/PIO0_11/AD0/CT32B0_MAT3
I/O configuration for pin
R/PIO1_0/AD1/CT32B1_CAP0
I/O configuration for pin
R/PIO1_1/AD2/CT32B1_MAT0
I/O configuration for pin
R/PIO1_2/AD3/CT32B1_MAT1
I/O configuration for pin PIO3_0/DTR
I/O configuration for pin PIO3_1/DSR
I/O configuration for pin
PIO2_3/RI/MOSI1
I/O configuration for pin
SWDIO/PIO1_3/AD4/CT32B1_MAT2
I/O configuration for pin
PIO1_4/AD5/CT32B1_MAT3
I/O configuration for pin PIO1_11/AD7
I/O configuration for pin PIO3_2/DCD
I/O configuration for pin
PIO1_5/RTS/CT32B0_CAP0
Reset
value
0x00
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
0xD0
UM10398
© NXP B.V. 2012. All rights reserved.
Reference
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